The present invention relates to a ferroelectric memory device formed by using ferroelectric capacitors. More particularly, the present invention relates to a simple matrix type ferroelectric memory device having no cell transistor and including memory cells formed only by ferroelectric capacitors, and a method for manufacturing the same.
In recent years, research and development of thin films such as PZT and SBT, ferroelectric capacitors using these thin films, ferroelectric memory devices, and the like have been extensively conducted. The structure of ferroelectric memory devices is roughly divided into a 1T, 1T1C, 2T2C, and a simple matrix type. A 1T type ferroelectric memory device has a retention (data retention) as short as one month since an internal electric field inevitably occurs in the capacitor. Therefore, it is considered to be impossible to ensure a 10-year guarantee generally required for semiconductors. A simple matrix type ferroelectric memory device has a cell size smaller than that of the 1T1C type and 2T2C type ferroelectric memory devices and allows multilayering of capacitors. Therefore, an increase in the degree of integration and reduction of cost are expected by using a simple matrix type ferroelectric memory device.
Conventional simple matrix type ferroelectric memory devices are disclosed in Japanese Patent Application Laid-open No. 9-116107 and the like. Japanese Patent Application Laid-open No. 9-116107 discloses a drive method in which a voltage one-third of a write voltage is applied to nonselected memory cells when writing data into the memory cells. However, this technology does not provide detailed description relating to hysteresis loop characteristics of the ferroelectric capacitor necessary for the operation. The present inventors have conducted studies and found that a hysteresis loop having good squareness is indispensable to obtain a simple matrix type ferroelectric memory device which can be operated in practice.